Sigrity PowerDC offers an extensive direct current analysis of circuits in the range of low voltages and high currents. An integrated thermal analysis which dedects the thermal behaviour on the board is used for the electric co-simulation. After you have defined your current sources and current sinks you can see from the IR Drop analysis the exact voltage values onto your electrical conductors. Furthermore, the simulation provides you with a detailed current distribution in the copper structures on the board. This current distribution compose toghether with the power dissipation of the components the basis of the thermal simulation. An evaluation of heat flow and thermal radiation (without convection) occurs both graphically and numerically. You recognize so hotspots for temperatures and current densities and you can increase the reliability of your power supply.
PowerDC offers a high automated workflow with checklists that enables also users whitout studies of the thermodynamics to obtain quickly useful results and to deduce design rules for high current applications.
For the 3D simulation the field solver must create a 3D grid (mesh/grid) with points where is then simulated. Many 3D solver use a uniform system; by a finer grid the simulation quality increases, but also the simulation time encreases exponentially. Using adaptive meshing and a multi grid methode the solver recognizes independently sensitive areas and refines in this area the grid. This renders the simulation faster and more exactely as many other solutions.
Multi-Board thermal simulation
In Allegro Sigrity PowerDC it is possible to use several board or IC package data in an electrothermal co-simulation. With this efficiant and easy to use flow also the thermal interaction of e.g. plugged DIM modules can be analysed.
The integrated simulation flow in Sigrity PowerDC enables an electrothermal co-simulation which considers the electrically induced self-heating. If on a pcb high currents are circulating there is a heating. In PowerDC the current density is dedected with a simulation and used as input value for the heat transfer analysis. The board (joule heating) and componant heating modifies the temperature distribution on the printed curcuit board.
At higher temperatures the electrical resistance and the leakage power dissipation of a circuit increase. These modified values feed in turn the re-simulation of the current density. In the co-simulation this circulation of changing values and simulations is running through until a stable meaningful value in "steady state" is positionned.
Current density and current direction
- Pinpoints IR drop and voltage distribution issues
- Automatically identifies preferred voltage regulator module (VRM) sense line locations
- Locates current hotspots that can lead to reliability problems
- Identifies difficult-to-locate highly resistive routing neck-downs and finds the one via among thousands that will fail under stress
- Co-simulates electrical and thermal performance to identify interrelated voltage and temperature impacts
- Determines if it is possible to reduce plane layers without adding DC or thermal reliability risk
- Assesses multi-structure PCB and package designs along with chip-level information
- Considers what-if improvement options with a unique block-diagram results view, a range of visualization options, and interactive geometry editing
- Easy-to-deploy workflow that is ideal for occasional users and experts alike
- The industry’s only electrical/thermal co-simulation environment to enable rapid assessment of the thresholds for both with unparalleled accuracy
- Fastest available DC and thermal runtimes, even for large designs that include both package and PCB data
- Comprehensive, easy-to-confirm DC and thermal design-rule validation
- Patented automation to pinpoint the best remote sense line location, providing results 10-20% better than alternative reasonable locations
- Highly accurate, even for complex designs with multiple voltage domains and complex plane structures
- Comprehensive support for multi-structure designs including stacked die, multiple boards, and all popular package types
- Optimized for flows with Cadence® SiP Layout, Allegro® Package Designer, and Allegro PCB Designer
- Readily used in Mentor, Zuken, and Altium flows, accepting a mix of CAD databases where needed for multi-structure design support
Overview of the Allegro Sigrity Products: