Allegro Sigrity SI Base

Allegro Sigrity SI Base is tightly integrated int the Allegro platform and the solution for analysing high-speed signals on circuit boards or IC pagackes. By a mouse click on a line or a differential pair the physical caracteristics can be extracted in the context of the layer structure and the net topology and placed as model for the simulation in the time domain. This integration in the schematic respectively PCB Editor enables a high-speed compliant placement of the critical components. By the knowledge acquired in the simulation design rules for the PCB layout can be derived and saved directly in the central Constraint Manager.

Allegro Sigrity SI Base

With Allegro Sigrity SI Base values for the crosstalk of signals can be predicted which are saved depending on the layer structure in Crosstalk tables. While manual or automatic routing the tables will be accessed and a caution as online DRC will be issued in case of violation of the specified tolerances.
With a design link different design data bases can be interconnected. So entire transmission paths from driver to receiver via IC packages, circuit boards and connecters can be analyzed and their function and flow rate can be ensured.
 
Cadence provides on her homepage in addition to the tools also an extensive library with technical descriptions and lectures, design IP (PCI Express, DDR3, ...) and training videos.


 
Allegro Sigrity SI Base gives many reports or diagrams as for example the Trace Check Mode. This diagram shows the length of all lines as well as the color marked impedance on the respectiv line sections. With this diagram the user can clearly recognize where discontinuities of the impedance appears on a line but also how far other signals of the bus have unequal impedance jumps and for this reason the interface is not in balance.
Allegro Sigrity SI Impedance Plot


Overview of the Allegro Sigrity Products:

Allegro Sigrity
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