Allegro Sigrity SI
The product family Allegro Sigrity consists of signal and power integrity simulation tools printed circuits and IC-Packages. The Allegro Sigrity products base on the Allegro data base and can directly started without data transmission of the Allegro PCB, SiP or packaging tool. Design modification are verified quickly and on-the-fly. With the integrated solution the models and design rules are saved in the data base of the board. The Sigrity products are also available as standalone solutions and can import and simulate data from Mentor Graphics, Zuken or Altium.
The Power Aware Signal Integrity solution can be used for memory modules (e.g. DDR3) or for Multi Gigabit Serial Link interfaces (e.g. PCI Express). In doing so algorithmic transceiver Models are supported. The simulation processes depend on 3D full-wave fieldsolvers. The patented calculation methods enable exact results already after a short calculating time. Thereby it is possible to give detailed forecasts about Bit Error Rates (BER). The results of the power integrity analysis have sign-off quality. Interconnected differential signals and networks which lead across discrete componants (x-nets), are recognized, extracted and analyzed automatically. Allegro Sigrity SI recognizes electrical structures of several involved networks. The simulation can be done from the schema, respectively from the PCB Editor, and the results are written into the common data base.
Overview of the Allegro Sigrity Products:
- Electrical corsstalk can be determined and saved in design-dependend crosstalk tables. Those can be used for supporting the interactive and automatic routing and help so to reduce the number of layers.
- Using the design link several different designs can be combined in one common simulation. This can be several boards, or also design informations about IC-Packages. A simulation is able to analize the complete signal line from the driver, via IC-Packages, boards and connectors.
- Allegro Sigrity SI supports IO behavioral models so called AMI models.
- Cadence offers a resource library on her website with technical documents, Design-in IP (e.g. PCI Express or DDR3).